S MART ALPHA RF T RANSCEIVER
2.
Operation
The Host Data Rate pins are read when the PD pin goes high. The SmartALPHA must be put into standby
mode by taking the PD pin low in order to change the selection.
The SmartALPHA contains an on-board data buffer equal to two data packets. Therefore if RTS is asserted
(then the host is unable to receive data) the SmartALPHA will store a max of two data packets, all further data
packets received will be discarded.
No RF packets will be received by the module when it is in power down standby mode.
Each SmartALPHA has its own preset address. This is set during configuration. Any data received is
examined and the address header embedded within the data packet is compared with the RF60 address. Only
data received with matching address will be processed and output to the host, all other data will be discarded.
All SmartALPHA modules are shipped with a default address of 7E7E7E7E.
Operation Modes
The addressing protocol employed enables many different configurations such including:
one-to-one operation; for point to point data communication
broadcast operation; where a single master address many SmartALPHA modules concurrently. (using many
SmartALPHA modules set to the same address),
one-to-many ; A network consisting a master and many slaves (the receivers all have the same address)
many-to-one; where the transmitters all send to a single receiver address.
Because each SmartALPHA can contain a unique address, multiple SmartALPHA networks can co-exist in
the same area.
Serial Data Format
The SmartALPHA serial format settings are:
Baud Rate: Defined by DR1 and DR2 Pins
Data Bits: 8
Parity: None
Stop Bits: 1
Flow Control: Hardware
CTS Timing
With a standard buffer size of 64 bytes, CTS is asserted 20uS after the buffer is full. In cases where less
than 64 bytes are sent CTS is asserted after a timeout of 6mS.
DSSMARTALPHA-5
? 2009 REG No 277 4001, ENGLAND.
Page 4
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